glb_gtz's blog

PROBLEM:
I was hoping to be able to run the system at 16.67 MHz just like the OSI system. But just like the original Apple ][, the video has to read the memory interleaved with the processor. The 16.67 MHz, is 50 MHz / 3, with two 50 MHz cycles for the processor and one cycle for the memory. Preliminary testing of the APPLE ][ text video is not stable at 16.67 MHz. Even at 12.5 MHz (50 /4), the pixel clock and the CPU clock have to be syncronized.

I plan on using this blog to document my newest project. I found with the last project, documentation after the fact is more difficult than I thought it would be. I have a hard time remembering why I did some things the way that I did.